Southern African Large Telescope
Prime Focus Imaging Spectrograph
Procedure: Programming the Interlock CPLDs
Jeffrey W Percival
Note: the procedure varies slightly between the PSC1 and PSC2 interlock boards. Rather than make two procedures that are 95% the same, this procedure covers both boards; When we come to a choice, we give a little 2-line table with the PSC1 instruction on line 1, and the PSC2 instruction on line 2. The main source of difference is that PSC1 has a single CPLD; PSC2 has 2 CPLDs.
- a Windows PC with the Xilinx JTAG Programmer installed on it
- a parallel port on the PC
- the parallel-port I/O pod for [PSC1/PSC2]
- the desired CPLD files in C:\temp:
|psc2-1.jed & psc2-2.jed
- Make sure there are no other files in C:\temp
Initial state: all PDS front panel switches off, PCON computer off.
- Plug Xilinx pod into PSC Bulkhead connector:
|PSC1 Xilinx pod into PSC1-J0301
|PSC2 Xilinx pod into PSC2-J0401
- Turn on PFIS main power.
- Select Start>Programs>Xilinx Foundation Series 2.1i>Accessories>JTAG Programmer
- If the popup window is not blank, select Edit>Cut to blank it out
- Select Edit>Add Device (chip symbol will appear)
- Navigate to C:\temp
- Select (double click) the file(s):
Select Edit>Add Device
- Below each chip, note "XC95108 <filename>"
- Move the vertical cursor to the left of the chip icon[s]
- Select Edit>Select All (chip symbols should darken)
- Select Operations>Get Device ID; see "Xilinx XC95108 Rev: 0010" for each chip
- Click OK to dismiss dialog box
- Click OK in JTAG programmer window
- Select Operations>Program
- Select the "Erase before program" and "Verify" checkboxes
- Click OK to start the programming
- Operations Status window will show erase, programming, and verify operations. Will show "All operations were completed successfully"
- Click OK
- Select File>Exit
- For "Save changes to...?" click NO
- End of programming. Power down PFIS and unplug Xilinx pod from PSC bulkhead.